Recent advancements in analog signal chain require gain stages that are capable of amplifying a wide dynamic range of analog input signals. A switched capacitor gain stage is widely used in analog signal chain. In the switched capacitor gain stage, the analog input signal is sampled in one phase, called the sampling phase, and then gained up in another phase, called the hold phase.
However, there are certain constraints associated with the switched capacitor gain stage. The switched capacitor gain stage is required to settle within the hold phase, and a final settled value is required to be linear. In applications which require multiple switched capacitor gain stages, a noise contribution of each stage is required to be minimal. All these limitations are very difficult to achieve especially in the case of RF ADCs where the frequency of operation is very high.
One conventional approach is to use a closed loop gain stage. The solution can support a large analog input signal swing but it is not a feasible solution when the frequency of operation is very high since it contains many poles inside the loop. Another approach is to use an open loop preamplifier. This solution can support reasonably high frequency of operation but it cannot support a large analog input signal swing and also provides an uncontrolled gain.